The invention relates to a method of manufacturing a semiconductor device with a semiconductor body, by which method a polycrystalline or amorphous semiconductor layer is provided over the entire device in a stage in which the device has been provided with a metallization layer. Such methods are generally known, inter alia for the manufacture of integrated circuits. The stage of the process in which the wiring, for example in the form of aluminum tracks, is provided is called the back end of the process. It is no longer possible to carry out process steps at high temperatures in this stage, i.e. at temperatures higher than 500.degree. C., on account of the presence of the aluminum. This temperature limitation has the disadvantage that certain process steps are no longer possible in this stage, steps which can indeed be carried out advantageously in an earlier stage and which would also offer important advantages in the back end of the process. Among the process steps belonging to this category are the CVD (or LPCVD) deposition of polycrystalline (or amorphous) silicon. Amorphous or polycrystalline silicon layers may be used in the metallization stage of IC processes as antireflex coatings or as etching stoppers for etching back of tungsten layers or as dielectric layers in metal-metal antifuses in programmable arrays. The deposition temperature, however, is usually higher than 550.degree. C., which is not compatible with standard aluminum metallizations. Polycrystalline or amorphous silicon is accordingly often deposited in an alternative manner at a lower temperature, for example by means of plasma CVD or by sputtering. These processes often result in a lesser material quality, inter alia owing to impurities and/or a less good step covering. In addition, these processes are usually single-wafer processes, in contrast to CVD which takes place in batches and accordingly as a much shorter process time.